Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
1425Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
1265For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD
1417Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
1262Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
1420Post New Infosys Interview Questions
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Realized?