Basic Stuff related to Perl?1917
Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?4 10545
For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?3 8675
Explain the operation considering a two processor computer system with a cache for each processor.1844
What are the main issues associated with multiprocessor caches and how might you solve them?1 8183
Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.1 13506
In what cases do you need to double clock a signal before presenting it to a synchronous state machine?3 15738
You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?4 12354
What are the total number of lines written by you in C/C++? What compiler was used?1 3790
Implement a function with both ratioes and domino logic and merits and demerits of each logic?
What are the steps required to solve setup and hold violations in vlsi?
In Verilog code what does “timescale 1 ns/ 1 ps” signifies?
Write a VLSI program that implements a toll booth controller?
Describe the various effects of scaling?
what is Slack?
If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?
How logical gates are controlled by boolean logic?
Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
Explain the Various steps in Synthesis?
What are the different design techniques required to create a layout for digital circuits?
What are the different ways in which antenna violation can be prevented?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.
Explain what is Verilog?