What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?
3267What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
1 5011Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
3145What transistor level design tools are you proficient with? What types of designs were they used on?
5070If not into production, how far did you follow the design and why did not you see it into production?
1 5274
What types of CMOS memories have you designed? What were their size? Speed?
Differences between IRSIM and SPICE?
What are the Factors affecting Power Consumption on a chip?
Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?
How does Vbe and Ic change with temperature?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
what is the use of defpararm?
why is the number of gate inputs to CMOS gates usually limited to four?
What types of CMOS memories have you designed? What were their size? Speed?
Explain various adders and difference between them?
How to improve these parameters? (Cascode topology, use long channel transistors)
What are the different gates where boolean logic are applicable?
Explain how logical gates are controlled by Boolean logic?
Tell me how MOSFET works.