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Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
1663You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other
1573What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
1338How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?
1207For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
1279Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
1485Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
1299For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD
1459Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
1305Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
1455
What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
What is the difference between cmos and bipolar technologies?
Explain what is multiplexer?
What is the function of chain reordering?
Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?
How can you construct both PMOS and NMOS on a single substrate?
what is multiplexer?
Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?
Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
Cross section of a PMOS transistor?
What is Noise Margin? Explain the procedure to determine Noise Margin?
How does a Bandgap Voltage reference work?
What is the difference between nmos and pmos technologies?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
Explain Basic Stuff related to Perl?
