What is the ideal input and output resistance of a current source?

3062

Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.

1344

Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

1647

What are the steps involved in preventing the metastability?

1168

Draw the stick diagram of a NOR gate. Optimize it

1331

What transistor level design tools are you proficient with? What types of designs were they used on?

5107

What are the different ways in which antenna violation can be prevented?

1181

Working of a 2-stage OPAMP?

3236

Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

1517

You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

1615

What is the difference between cmos and bipolar technologies?

1181

Explain why is the number of gate inputs to cmos gates usually limited to four?

1553

What types of high speed CMOS circuits have you designed?

2615

How to improve these parameters? (Cascode topology, use long channel transistors)

2235

What are the Factors affecting Power Consumption on a chip?

1330