Interested to Buy Any Domain ? << Click Here >> for more details...
Describe the various effects of scaling?
Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?
Explain the operation of a 6T-SRAM cell?
why is the number of gate inputs to CMOS gates usually limited to four?
Design an 8 is to 3 encoder using 4 is to encoder?
How can you construct both PMOS and NMOS on a single substrate?
What was your role in the silicon evaluation/product ramp? What tools did you use?
How logical gates are controlled by boolean logic?
Cross section of a PMOS transistor?
For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
What is Body Effect?
How do you size NMOS and PMOS transistors to increase the threshold voltage?
Mention what are three regions of operation of mosfet and how are they used?
You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
