Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
What is threshold voltage?
what is verilog?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Are you familiar with the term MESI?
Differences between Array and Booth Multipliers?
For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What is the purpose of having depletion mode device?
Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
Write a program to explain the comparator?
Mention what are the different gates where Boolean logic are applicable?
what is the difference between the TTL chips and CMOS chips?
Mention what are three regions of operation of mosfet and how are they used?
Cross section of a PMOS transistor?