Embedded Systems Interview Questions
Questions Answers Views Company eMail

Difference between 80286 and 80287

Mascot,

2 7248

In a processor these are 120 instructions . Bits needed to impliment this instructions [a] 6 [b] 7 [c] 10 [d] none

Wipro,

2 7600

In 8085 microprocessor READY signal does.which of the following is incorrect statements [a]It is input to the microprocessor [b] It sequences the instructions

Wipro,

2 6907




Return address will be returned by function to

Wipro,

2 3884

load a mul a store t1 load b mul b store t2 mul t2 add t1 then the content in accumulator is

Wipro,

2 5089

In 8085 microprocessor READY signal does.which of the following is incorrect statements [a]It is input to the microprocessor [b] It sequences the instructions

Wipro,

4 6820

what is conductance and valence band?

1 3424

What is Fermi level?

5 4942

How does Vbe and Ic change with temperature?

Qualcomm,

1805

If the substrate doping concentration increase, or temperature increases, how will Vt change? it increase or decrease?

1347

what is Channel length modulation?

Intel,

1 1763

what is the doping?

5 3433

How does a pn junction works?

Wipro,

1 3844

What is the depletion region?

1 3105

Tell me the parameters as many as possible you know that used to character an amplifier?

913







Un-Answered Questions { Embedded Systems }

What was your role in the silicon evaluation or product ramp? What tools did you use?

965


In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?

2413


What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

1382


Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

1349


What is Noise Margin? Explain the procedure to determine Noise Margin?

1027


Differences between Array and Booth Multipliers?

2451


What is the ideal input and output resistance of a current source?

1647


Insights of a 4bit adder/Sub Circuit?

1907


Need to convert this VHDL code into VLSI verilog code? LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ----using all functions of specific package--- ENTITY tollbooth2 IS PORT (Clock,car_s,RE : IN STD_LOGIC; coin_s : IN STD_LOGIC_VECTOR(1 DOWNTO 0); r_light,g_light,alarm : OUT STD_LOGIC); END tollbooth2; ARCHITECTURE Behav OF tollbooth2 IS TYPE state_type IS (NO_CAR,GOTZERO,GOTFIV,GOTTEN,GOTFIF,GOTTWEN,CAR_PAID,CHEATE D); ------GOTZERO = PAID $0.00--------- ------GOTFIV = PAID $0.05---------- ------GOTTEN = PAID $0.10---------- ------GOTFIF = PAID $0.15---------- ------GOTTWEN = PAID $0.20--------- SIGNAL present_state,next_state : state_type; BEGIN -----Next state is identified using present state,car & coin sensors------ PROCESS(present_state,car_s,coin_s) BEGIN CASE present_state IS WHEN NO_CAR => IF (car_s = '1') THEN next_state <= GOTZERO; ELSE next_state <= NO_CAR; END IF; WHEN GOTZERO => IF (car_s ='0') THEN next_state <= CHEATED; ELSIF (coin_s = "00") THEN next_state <= GOTZERO; ELSIF (coin_s = "01") THEN next_state <= GOTFIV; ELSIF (coin_s ="10") THEN next_state <= GOTTEN; END IF; WHEN GOTFIV=> IF (car_s ='0') THEN next_state <= CHEATED; ELSIF (coin_s = "00") THEN next_state <= GOTFIV; ELSIF (coin_s = "01") THEN next_state <= GOTTEN; ELSIF (coin_s <= "10") THEN next_state <= GOTFIV; END IF; WHEN GOTTEN => IF (car_s ='0') THEN next_state <= CHEATED; ELSIF (coin_s ="00") THEN next_state <= GOTTEN; ELSIF (coin_s="01") THEN next_state <= GOTFIV; ELSIF (coin_s="10") THEN next_state <= GOTTWEN; END IF; WHEN GOTFIF => IF (car_s ='0') THEN next_state <= CHEATED; ELSIF (coin_s = "00") THEN next_state <= GOTFIF; ELSIF (coin_s ="01") THEN next_state <= GOTTWEN; ELSIF (coin_s = "10") THEN next_state <= GOTTWEN; END IF; WHEN GOTTWEN => next_state <= CAR_PAID; WHEN CAR_PAID => IF (car_s = '0') THEN next_state <= NO_CAR; ELSE next_state<= CAR_PAID; END IF; WHEN CHEATED => IF (car_s = '1') THEN next_state <= GOTZERO; ELSE next_state <= CHEATED; END IF; END CASE; END PROCESS;-----End of Process 1 -------PROCESS 2 for STATE REGISTER CLOCKING-------- PROCESS(Clock,RE) BEGIN IF RE = '1' THEN present_state <= GOTZERO; ----When the clock changes from low to high,the state of the system ----stored in next_state becomes the present state----- ELSIF Clock'EVENT AND Clock ='1' THEN present_state <= next_state; END IF; END PROCESS;-----End of Process 2------- --------------------------------------------------------- -----Conditional signal assignment statements---------- r_light <= '0' WHEN present_state = CAR_PAID ELSE '1'; g_light <= '1' WHEN present_state = CAR_PAID ELSE '0'; alarm <= '1' WHEN present_state = CHEATED ELSE '0'; END Behav;

3726


Are you familiar with the term snooping?

2000


If not into production, how far did you follow the design and why did not you see it into production?

810


For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

918


what is the command/instruction in ARM that does not do anything or does not execute any instruction ? (except NOP instruction)

1891


How can you model a SRAM at RTL Level?

3895


If the substrate doping concentration increase, or temperature increases, how will Vt change? it increase or decrease?

1347