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What r the phenomenon which come into play when the devices are scaled to the sub-micron lengths?
4 8452Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?
13 37005
What is the ideal input and output resistance of a current source?
Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;
Explain what is slack?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?
What is the main function of metastability in vsdl?
Draw a 6-T SRAM Cell and explain the Read and Write operations
Why does the present vlsi circuits use mosfets instead of bjts?
What types of CMOS memories have you designed? What were their size? Speed?
What products have you designed which have entered high volume production?
Are you familiar with the term MESI?
Explain how Verilog is different to normal programming language?
What are the different ways in which antenna violation can be prevented?
Explain the working of 4-bit Up/down Counter?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
