Interested to Buy Any Domain ? << Click Here >> for more details...
You have a driver that drives a long signal & connects to an
input device. At the input device there is either overshoot,
undershoot or signal threshold violations, what can be done
to correct this problem?
- 4 Answers
- 16261 Views
- Intel, I also Faced
- E-Mail Answers
Answers were Sorted based on User's Feedback
Answer / the big boss
This is a signal integrity question for board designers.
there are two types of termination schemes viz. series and
parallel termination. series termination is where a resistor
of small value ( rule of thumb 1/2 of characteristic
impedance of the trace ) placed near the source ( near
driver). the parallel termination is a combination of two
resister ( rule of thumb twice the char. impedance f the
trace) placed near the destination ( input) where one
resistor connects the signal trace to the VCC and other
connects to the GNd.
| Is This Answer Correct ? | 11 Yes | 3 No |
Answer / baba
To avoid signal threshold violations(due to loss in long
path), use repeaters to boost signal strength at spec.
intervals.
| Is This Answer Correct ? | 4 Yes | 3 No |
Answer / nikki
a cdm clamp can be used at the receiver input to protect
the circuitry form overshoot/ undershoot
| Is This Answer Correct ? | 1 Yes | 0 No |
Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.
what is the doping?
What r the phenomenon which come into play when the devices are scaled to the sub-micron lengths?
Implement a function with both ratioes and domino logic and merits and demerits of each logic?
What are the different classification of the timing control?
What are the steps involved in designing an optimal pad ring?
Are you familiar with VHDL and/or Verilog?
what is Latch up?How to avoid Latch up?
What are set up time & hold time constraints? What do they signify?
Differences between netlist of HSPICE and Spectre?
Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
86 Family 
