What are the steps involved in designing an optimal pad ring?
Explain Cross section of a PMOS transistor?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
For CMOS logic, give the various techniques you know to minimize power consumption
Explain Basic Stuff related to Perl?
Give the cross-sectional diagram of the cmos.
What is Noise Margin? Explain the procedure to determine Noise Margin?
What is threshold voltage?
What are the various regions of operation of mosfet? How are those regions used?
Explain the Working of a 2-stage OPAMP?
What are the changes that are provided to meet design power targets?
What is the difference between nmos and pmos technologies?
Draw the stick diagram of a NOR gate. Optimize it
Implement a function with both ratioes and domino logic and merits and demerits of each logic?
What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?
