Answer / kanak

Let's take an example of different processors(along with
their independent caches) sharing the same memory system.

Now if this memory is a Read-Write memory and let's say
that one of the processors writes to this memory after some
data computation, all the processors need to update their
individual cache copies of the now modified memory. To do
this the concept of snooping is implemented. cache snooping
is the means by which each cache constantly
monitors/detects the bus for any write to a memory location
and if a write is found, it invalidates it current copy of
cached memory data and copies the new content over.

Explain what is scr (silicon controlled rectifier)?

0 Answers  

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How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

0 Answers   Infosys,

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You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?

4 Answers   Intel,

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what is multiplexer?

0 Answers  

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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what is the doping?

5 Answers  

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Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?

13 Answers   Intel,

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Explain about stuck at fault models, scan design, BIST and IDDQ testing?

3 Answers   Intel,

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Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

0 Answers   Infosys,

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Why don?t we use just one NMOS or PMOS transistor as a transmission gate?

2 Answers   Infosys,

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Why is Extraction performed?

1 Answers   Intel,

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Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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