Answer / rajashekar @ nitt

give input at base and connect resistor at collector and
gnd at emitter,vcc at collector finaaly take output at
collector.

Answer / harshgandhi126

A single transistor itself is an inverter.Connect resistor
and +Vcc to collecot and Gnd to Emmiter. After that give an
input to Base terminal and take output between Collector
and Ground.

Answer / sharath & bhanu

Use a enhancement mode n-mos MOSFET and give i/p to base,
source to vdd and drain to o/p pin. Enhancement mode keeps
MOSFET always in ON state. Hence i/p logic '1' turns off
the transistor thus making o/p logic '0'

Answer / prateek

connect the gate of nmos to vdd so that it is always on
give the input at drain and tap the output from source.

What is Noise Margin? Explain the procedure to determine Noise Margin?

0 Answers  

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Basic Stuff related to Perl?

0 Answers   Intel,

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What products have you designed which have entered high volume production?

0 Answers   Intel,

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Are you familiar with VHDL and/or Verilog?

1 Answers   Intel,

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Explain how MOSFET works?

0 Answers  

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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What types of high speed CMOS circuits have you designed?

0 Answers   Intel,

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What is the difference between = and == in C?

5 Answers   Intel,

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What is a D-latch? Write the VHDL Code for it?

3 Answers   Intel,

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what is Channel length modulation?

2 Answers   Intel,

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What is SPICE?

4 Answers   Intel,

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If not into production, how far did you follow the design and why did not you see it into production?

0 Answers   Intel,

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