Why is Extraction performed?
Answer / nikki
Post layout extraction is neccessary to get the accurate
netlist , with parasitic capacitance and rasistance. Post
layout simulation are done using the extracted neltist as
this gives a better approximation of what the circuit
behaviour would be in silicon.
| Is This Answer Correct ? | 10 Yes | 1 No |
Cross section of a PMOS transistor?
Insights of a 4bit adder/Sub Circuit?
Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What is interrupt latency?
What does it mean “the channel is pinched off”?
What is the difference between fifo and the memory?
6 Answers DewSoft, Intel, Pentagon Rugged Systems,
Explain how logical gates are controlled by Boolean logic?
Explain various adders and difference between them?
Mention what are the two types of procedural blocks in Verilog?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.
While using logic design, explain the various steps that r followed to obtain the desirable design in a well defined manner?
what is multiplexer?