Answer / g.sunil kumar

Pu stands for per unit and this will be used in power
system single line diagram there it is like a huge
electrical circuit with no of componenets (generators,
transformers, loads) with different ratings (in MVA and
KV). To bring all the ratings into common platform we use
pu concept in which, in general largest MVA and KV ratings
of the component is considered as base values, then all
other component ratings will get back into this basis.Those
values are called as pu values.

Answer / shalini

PU refers to per unit sysytem

Answer / mahmud

the per unit value of any quantity is defined as the ratio
of the quantity to it's base value es pressed as decimal.


p.u=actual value/base value

Answer / murali

the pu system simply th concept in electrical engg. once
the base value is defined, we can easily visualise each
parameters.
this makes the calculation very simple.

why in power staions distriution r like 11kv,33kv,66kv in india?

4 Answers  

---

what is allowable current flows from phase to ground with out tripping the breaker

1 Answers  

---

What happens to the terminal voltage of an alternator connected to a bus bar when it is suddenly disconnected from the bus bar??

2 Answers  

---

how can we make cable shedule for controll wiring ? which details must be required for it.?

0 Answers   L&T,

---

What is effect of power factor on change in voltage

13 Answers   APNPDCL, apspdcl, My Home Industries,

---

---

1.What is wind span ,wight span and normal span, and what is the difference for 132kv transmission .

1 Answers   PKR,

---

what is servo motor and how it works?

0 Answers   Godrej,

---

HOW TO CONNECT THREE PHASE OVER LOAD RELAY FOR SINGLE PHASE

2 Answers   Quest,

---

what do you mean by cl PS CTs? What are technical details required for it's manufacturing?

1 Answers  

---

control wiring purpose,standards, ferrule code standard, interlock, schematic, symbol

1 Answers  

---

What are the basic elements used for modeling mechanical rotational system?

0 Answers  

---

There are 2 Flip_Flop with logic between them. Given Clock to Q delay, logic prop. delay, set up and hold times specify maximum clock frequency of system. What happens if second output fed back to first input. Any changes? What happens with timing if second output is fed back to logic between the flops? Good Luck!

1 Answers   Qualcomm,

---