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VLSI Interview Questions
Questions Answers Views Company eMail

Explain CMOS Inverter transfer characteristics?

ADS,

3864

Explain sizing of the inverter?

Infosys,

4367

How do you size NMOS and PMOS transistors to increase the threshold voltage?

4 29348

What is Noise Margin? Explain the procedure to determine Noise Margin?

2412

Give the expression for CMOS switching power dissipation?

Cypress Semiconductor,

2 8212

What is Body Effect?

CG CoreEL, Cisco, TA,

2463

What happens to delay if you increase load capacitance?

Google,

1 3566

What are the limitations in increasing the power supply to reduce delay?

Infosys,

2 13313

How does Resistance of the metal lines vary with increasing thickness and increasing length?

Infosys,

3 13452

What happens if we increase the number of contacts or via from one metal layer to the next?

Infosys,

1 7454

Give the various techniques you know to minimize power consumption?

5 12836

Explain the Charge Sharing problem while sampling data from a Bus?

1 4046

What happens if we use an Inverter instead of the Differential Sense Amplifier?

2940

What is the critical path in a SRAM?

3106

In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?

Infosys,

4060


Post New VLSI Questions

Un-Answered Questions { VLSI }

Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?

3329


What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

2391


what is the use of defpararm?

1097


Design an 8 is to 3 encoder using 4 is to encoder?

1289


Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

1397


Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?

1090


What is the function of enhancement mode transistor?

1064


In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?

1126


Explain Cross section of an NMOS transistor?

977


What are the steps required to solve setup and hold violations in vlsi?

1029


What was your role in the silicon evaluation/product ramp? What tools did you use?

3653


What are the ways to Optimize the Performance of a Difference Amplifier?

2387


Explain the operation considering a two processor computer system with a cache for each processor.

2806


What is the difference between cmos and bipolar technologies?

1087


What are the changes that are provided to meet design power targets?

1050