VLSI Interview Questions, Answers for Freshers and Experienced asked in various Company Job Interviews

VLSI Interview Questions

Questions Answers Views Company eMail

Explain CMOS Inverter transfer characteristics?

ADS,

3926

Explain sizing of the inverter?

Infosys,

4429

How do you size NMOS and PMOS transistors to increase the threshold voltage?

4 29566

What is Noise Margin? Explain the procedure to determine Noise Margin?

2463

Give the expression for CMOS switching power dissipation?

Cypress Semiconductor,

2 8325

What is Body Effect?

CG CoreEL, Cisco, TA,

2521

What happens to delay if you increase load capacitance?

Google,

1 3657

What are the limitations in increasing the power supply to reduce delay?

Infosys,

2 13514

How does Resistance of the metal lines vary with increasing thickness and increasing length?

Infosys,

3 13611

What happens if we increase the number of contacts or via from one metal layer to the next?

Infosys,

1 7571

Give the various techniques you know to minimize power consumption?

5 13096

Explain the Charge Sharing problem while sampling data from a Bus?

1 4685

What happens if we use an Inverter instead of the Differential Sense Amplifier?

3005

What is the critical path in a SRAM?

3200

In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?

Infosys,

4129

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Un-Answered Questions { VLSI }

Explain what is the depletion region?

1089

What are the changes that are provided to meet design power targets?

1122

What are the different ways in which antenna violation can be prevented?

1127

What does it mean “the channel is pinched off”?

1359

what is Slack?

1193

Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

1458

Explain the Charge Sharing problem while sampling data from a Bus?

4733

Explain how logical gates are controlled by Boolean logic?

1193

what is a sequential circuit?

1172

Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

1080

Explain why is the number of gate inputs to cmos gates usually limited to four?

1508

What is Body Effect?

2521

Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram

1485

Give the cross-sectional diagram of the cmos.

1002

Implement a function with both ratioes and domino logic and merits and demerits of each logic?

1204

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