Answer / banibrata

1/2 C V^2.f

Answer / arpan

P=CL * Vdd^2 * f
CL= Load capacitance
VDD = Supply Voltage
f= Switching frequency

During high to low transition the load
capacitance is discharged and during low to high transition
the load capacitance is charged.

Are you familiar with VHDL and/or Verilog?

1 Answers   Intel,

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Have you studied buses? What types?

1 Answers   Intel,

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Cross section of a PMOS transistor?

0 Answers   Intel,

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What types of CMOS memories have you designed? What were their size? Speed?

0 Answers   e-tec, Intel,

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Have you studied buses? What types?

5 Answers   Intel,

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verify nmos passes good logic 0 and passes bad logic 1.also verify that pmos passes good logic 1 and passes bad logic 0.

2 Answers   Cosmic Circuits, HP,

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What happens if we delay the enabling of Clock signal?

4 Answers  

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How does a pn junction works?

2 Answers   Wipro,

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0 Answers   Intel,

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0 Answers   Infosys,

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3 Answers   Intel,

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How many bit combinations are there in a byte?

6 Answers   Intel,

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