In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

1 Answers   Intel,

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What happens to delay if you increase load capacitance?

1 Answers   Google,

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Implement a 2 I/P and gate using Tran gates?

0 Answers   Intel,

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Working of a 2-stage OPAMP?

0 Answers   Intel, Tata Elxsi,

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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What are set up time & hold time constraints? What do they signify?

3 Answers  

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What are the steps involved in designing an optimal pad ring?

0 Answers  

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Given a circuit and asked to tell the output voltages of that circuit?

1 Answers   Intel, Omega Healthcare,

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Explain the various Capacitances associated with a transistor and which one of them is the most prominent?

2 Answers   Intel,

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What are the steps involved in preventing the metastability?

0 Answers  

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Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?

13 Answers   Intel,

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Write a program to explain the comparator?

0 Answers  

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