Process technology? What package was used and how did you
model the package/system? What parasitic effects were
considered?
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Give the cross-sectional diagram of the cmos.
Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
If not into production, how far did you follow the design and why did not you see it into production?
what are three regions of operation of MOSFET and how are they used?
What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).
Explain various adders and diff between them?
What are the changes that are provided to meet design power targets?
what is short Channel effect.
Explain the operation of a 6T-SRAM cell?
Define threshold voltage?
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What is the difference between nmos and pmos technologies?
Explain sizing of the inverter?