In a SRAM layout, which metal layers would you prefer for
Word Lines and Bit Lines? Why?
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Give various factors on which threshold voltage depends.
What?s the difference between Testing & Verification?
Give the cross-sectional diagram of the cmos.
Explain why present VLSI circuits use MOSFETs instead of BJTs?
Draw a CMOS Inverter. Explain its transfer characteristics
Implement a function with both ratioes and domino logic and merits and demerits of each logic?
Explain the operation of a 6T-SRAM cell?
Are you familiar with VHDL and/or Verilog?
Explain about stuck at fault models, scan design, BIST and IDDQ testing?
What is validation?
What was your role in the silicon evaluation/product ramp? What tools did you use?
Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)