86 Family Interview Questions
Questions Answers Views Company eMail

Difference between 80286 and 80287

Mascot,

2 8152

In a processor these are 120 instructions . Bits needed to impliment this instructions [a] 6 [b] 7 [c] 10 [d] none

Wipro,

2 8451

In 8085 microprocessor READY signal does.which of the following is incorrect statements [a]It is input to the microprocessor [b] It sequences the instructions

Wipro,

2 8047




Return address will be returned by function to

Wipro,

2 4525

load a mul a store t1 load b mul b store t2 mul t2 add t1 then the content in accumulator is

Wipro,

2 5950

Which type of architecture 8085 has?

Wipro, Sasken, DRDO,

6 27911

How many memory locations can be addressed by a microprocessor with 14 address lines?

HCL, Paavai,

5 24715

8085 is how many bit microprocessor?

18 23116




Why is data bus bi-directional?

TCS, Wipro, College School Exams Tests,

11 42506

What is the function of accumulator?

Sandvik, SICSR,

20 82838

What is flag, bus?

8 19885

What are tri-state devices and why they are essential in a bus oriented system?

HP, Keane India Ltd,

1 6497

Why are program counter and stack pointer 16-bit registers?

HCL, College School Exams Tests,

6 39021

What does it mean by embedded system?

11 14970

What are the different addressing modes in 8085?

Syntel, Rambala Exports,

25 52930


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Un-Answered Questions { 86 Family }

what is the undefined bits in flag registers of 8085 microprocessor?

864


In the instruction FADD, What does F stands for

4


If a1M1× DRAM requires 4 ms for a refresh and has 256 rows to be refreshed, no more than __________ of time must pass before another row is refreshed.

4


What is the difference between a microprocessor and a microcontroller?

5


In which T-state does the CPU sends the address o memory or I/O and the ALE signal for Demultiplexing

3






List some analog modulation techniques.

3


Signal voltage ranges for a logic high and for a logic low in RS-232C standard are

2


The PCI bus is the important bus found in all the new Pentium systems because

2


The answer to the above question is breaking the combinational circuit and pipelining it. What will be affected if you do this?

1698


What is 8251?

3


What are the main differences between the 8085 and 8086 microprocessor?

3


What is the difference between 8085 microprocessor and a 8086 microprocessor?

5


What is clock frequency for 8085?

3


Which type of JMP instruction assembles if the distance is 0020h bytes

3


I have code and test bench however it is not working porperly. Need help to get it working. module fsm(clock,reset,coin,vend,state,change); \\these are the inputs and the outputs. input clock; input reset; input [2:0]coin; output vend; output [2:0]state; output [2:0]change; \\i need to define the registers as change,coin and vend reg vend; reg [2:0]change; wire [2:0]coin; \\my coins are declared as parameters to make reading better. parameter [2:0]NICKEL=3’b001; parameter [2:0]DIME=3’b010; parameter [2:0]NICKEL_DIME=3’b011; parameter [2:0]DIME_DIME=3’b100; parameter [2:0]QUARTER=3’b101; \\MY STATES ARE ALSO PARAMETERS . I DONT WANT TO MAKE YOU READ \\IN MACHINE LANGUAGE parameter [2:0]IDLE=3’b000; parameter [2:0]FIVE=3’b001; parameter [2:0]TEN=3’b010; parameter [2:0]FIFTEEN=3’b011; parameter [2:0]TWENTY=3’b100; parameter [2:0]TWENTYFIVE=3’b101; \\AS ALWAYS THE STATES ARE DEFINED AS REG reg [2:0]state,next_state; \\MY MACHINE WORKS ON STATE AND COIN always @(state or coin) begin next_state=0; \\VERYFIRST NEXT STATE IS GIVEN ZERO case(state) IDLE: case(coin) \\THIS IS THE IDLE STATE NICKEL: next_state=FIVE; DIME: next_state=TEN; QUARTER: next_state=TWENTYFIVE; default: next_state=IDLE; endcase FIVE: case(coin) \\THIS IS THE SECOND STATE NICKEL: next_state=TEN; DIME: next_state=FIFTEEN; QUARTER: next_state=TWENTYFIVE; //change=NICKEL default: next_state=FIVE; endcase TEN: case(coin) \\THIS IS THE THIRD STATE NICKEL: next_state=FIFTEEN; DIME: next_state=TWENTY; QUARTER: next_state=TWENTYFIVE; //change=DIME default: next_state=TEN; endcase FIFTEEN: case(coin) \\THIS IS THE FOURTH STATE NICKEL: next_state=TWENTY; DIME: next_state=TWENTYFIVE; QUARTER: next_state=TWENTYFIVE; //change==NICKEL_DIME default: next_state=FIFTEEN; endcase TWENTY: case(coin) \\THIS IS THE FIFTH STATE NICKEL: next_state=TWENTYFIVE; DIME: next_state=TWENTYFIVE; //change=NICKEL QUARTER: next_state=TWENTYFIVE; //change==DIME_DIME default: next_state=TWENTY; endcase TWENTYFIVE: next_state=IDLE; \\THE NEXT STATE HERE IS THE RESET default : next_state=IDLE; endcase end always @(clock) begin \\WHENEVER I GIVE A RESET I HAVE TO MAKE THE STATE TO IDLE AND VEND TO 1 if(reset) begin state <= IDLE; vend <= 1’b0; // change <= 3’b000; end \\THE CHANGE ALSO HAS TO BECOME NONE else state <= next_state; case (state) \\HERE WE DECIDE THE NEXT STATE \\ALL THE STATES ARE DEFINED HERE AND THE OUTPUT IS ALSO GIVEN IDLE: begin vend <= 1’b0; change <=3’d0; end FIVE: begin vend <= 1’b0; if (coin==QUARTER) change <=NICKEL; else change <=3’d0; TEN: begin vend <= 1’b0; if (coin==QUARTER) change <=DIME; else change <= 3’d0; FIFTEEN : begin vend <= 1’b0; if (coin==QUARTER) change <=NICKEL_DIME; else change TWENTY : begin vend <= 1’b0; if (coin==DIME) change <=NICKEL; else if (coin==QUARTER) TWENTYFIVE : begin vend <= 1’b1; change <=3’d0; end default: state <= IDLE; endcase end endmodule module test; \\THE INPUT IN THE FSM MODULE ARE REG HERE reg clock,reset; reg [2:0]coin; \\THE OUTPUT IN THE FSM MODULE ARE WIRES HERE wire vend; wire [2:0]state; wire [2:0]change; \\THE PARAMETERS AGAIN FOR THE COIN AND STATE parameter [2:0]IDLE=3’b000; parameter [2:0]FIVE=3’b001; parameter [2:0]TEN=3’b010; parameter [2:0]FIFTEEN=3’b011; parameter [2:0]TWENTY=3’b100; parameter [2:0]TWENTYFIVE=3’b101; parameter [2:0]NICKEL=3’b001; parameter [2:0]DIME=3’b010; parameter [2:0]NICKEL_DIME=3’b011; parameter [2:0]DIME_DIME=3’b100; parameter [2:0]QUARTER=3’b101; \\I MONITOR THE TIME,DRINK,RESET,CLOCK,STATE AND CHANGE FOR CHANGES. initial begin $display("Time\tcoin\tdrink\treset\tclock\tstate\tchange"); $monitor("%g\t%b\t%b\t%b\t%b\t%d\t% d",$time,coin,vend,reset,clock,state,change); \\NEW FEATURE: MY MACHINE HAS THE FACILITY TO DUMP VARIABLES SO THAT \\ I CAN VIEW THEM USING A VCD VIEWER. $dumpvars; $dumpfile("file.vcd"); // Dump output file. \\THIS IS WHERE THE COINS ARE ADDED. clock=0; reset=1; \\FIRST LETS RESET THE MACHINE #2 reset=0; coin=NICKEL; \\CHECK FOR STATE 1 #2 reset=1; coin=2’b00; #2 reset=0; coin=DIME; \\RESET AGAIN AND CHECK FOR STATE 2 #2 reset=1; coin=2’b00; #2 reset=0; \\RESET AGAIN AND CHECK FOR STATE 5 coin=QUARTER; #2 reset=1; coin=2’b00; #2 reset=0; \\RESET AGAIN AND CHECK FOR STATE 5 coin=NICKEL; #2 coin=NICKEL; #2 coin=NICKEL; #2 coin=NICKEL; #2 coin=NICKEL; #2 reset=1; coin=2’b00; #2 reset=0; \\RESET AGAIN AND CHECK FOR STATE 5 AND SO ON coin=NICKEL; #2 coin=DIME; #2 coin=DIME; #2 reset=1; coin=2’b00; #2 reset=0; coin=NICKEL; #2 coin=DIME; #2 coin=QUARTER; #2 reset=1; coin=2’b00; #2 reset=0; coin=NICKEL; #2 coin=NICKEL; #2 coin=NICKEL; #2 coin=DIME; #2 reset=1; coin=2’b00; #2 reset=0; coin=NICKEL; #2 coin=NICKEL; #2 coin=NICKEL; #2 coin=NICKEL; #2 coin=DIME; #2 reset=1; coin=2’b00; #2 reset=0; coin=NICKEL; #2 coin=NICKEL; #2 coin=QUARTER; #2 reset=1; coin=2’b00; #2 reset=0; coin=NICKEL; #2 coin=QUARTER; #2 reset=1; coin=2’b00; #2 $finish; end \\THE CLOCK NEEDS TO TICK EVERY 2 TIME UNIT always #1 clock=~clock; //always @(state) // coin=!coin; initial begin if (reset) coin=2’b00; end \\THIS IS WHERE I INSTANTIATE THE MACHINE fsm inst1(clock,reset,coin,vend,state,change); endmodule

2598