What work have you done on full chip Clock and Power
distribution? What process technology and budgets were
used?
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Working of a 2-stage OPAMP?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Are you familiar with VHDL and/or Verilog?
Are you familiar with the term snooping?
Explain Cross section of an NMOS transistor?
What are the different limitations in increasing the power supply to reduce delay?
Differences between IRSIM and SPICE?
Explain the operation considering a two processor computer system with a cache for each processor.
Explain the Working of a 2-stage OPAMP?
Explain what is Verilog?
what is a sequential circuit?
WHAT IS THE DIFFERENCE BETWEEN TESTING AND VERIFICATION OF VLSI CIRCUIT?