What work have you done on full chip Clock and Power
distribution? What process technology and budgets were
used?
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What are set up time & hold time constraints? What do they signify?
What is the purpose of having depletion mode device?
Explain the difference between write through and write back cache.
Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
For CMOS logic, give the various techniques you know to minimize power consumption
You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
Are you familiar with VHDL and/or Verilog?
How does a Bandgap Voltage reference work?
What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
what is Slack?
Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?