Are you familiar with VHDL and/or Verilog?
Answer / sunita
Just like we use Software description languages like C,C++
etc, in the same manner VHDL and Verilog are hardware
Description languages. These languages are used to describe
the hardware that will be used to perform a aprticular
operation.
| Is This Answer Correct ? | 4 Yes | 0 No |
Differences between IRSIM and SPICE?
6-T XOR gate?
Mention what are three regions of operation of mosfet and how are they used?
Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
In what cases do you need to double clock a signal before presenting it to a synchronous state machine?
What transistor level design tools are you proficient with? What types of designs were they used on?
What is threshold voltage?
What is the main function of metastability in vsdl?
Differences between Signals and Variables in VHDL? If the same code is written using Signals and Variables what does it synthesize to?
What are the total number of lines written by you in C/C++? What compiler was used?
If not into production, how far did you follow the design and why did not you see it into production?
What are the main issues associated with multiprocessor caches and how might you solve them?