Differences between Signals and Variables in VHDL? If the same code is written using Signals and Variables what does it synthesize to?

1 Answers   IIT, Intel,

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What happens when the gate oxide is very thin?

3 Answers   Intel,

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Why don?t we use just one NMOS or PMOS transistor as a transmission gate?

2 Answers   Infosys,

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In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

3 Answers   IBM, Intel, nvidia,

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Explain the various MOSFET Capacitances & their significance ?

1 Answers   Infosys,

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In Verilog code what does “timescale 1 ns/ 1 ps” signifies?

0 Answers  

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Explain Cross section of an NMOS transistor?

0 Answers   Intel,

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Explain the three regions of operation of a mosfet.

0 Answers  

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What does the above code synthesize to?

0 Answers   Intel,

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What are set up time & hold time constraints? What do they signify?

3 Answers  

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If not into production, how far did you follow the design and why did not you see it into production?

0 Answers   Intel,

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What is pipelining and how can we increase throughput using pipelining?

1 Answers   Intel,

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