Implement a function with both ratioes and domino logic and merits and demerits of each logic?
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Cross section of a PMOS transistor?
Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)
What is the difference between = and == in C?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.
Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
Explain why present VLSI circuits use MOSFETs instead of BJTs?
How do you size NMOS and PMOS transistors to increase the threshold voltage?
In what cases do you need to double clock a signal before presenting it to a synchronous state machine?
What happens to delay if you increase load capacitance?
Have you studied buses? What types?
What was your role in the silicon evaluation/product ramp? What tools did you use?