How can you construct both PMOS and NMOS on a single substrate?
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What happens if we delay the enabling of Clock signal?
What is latchup? Explain the methods used to prevent it?
Insights of a 2 input NOR gate. Explain the working?
Explain why present VLSI circuits use MOSFETs instead of BJTs?
What is FPGA?
What is the function of tie-high and tie-low cells?
Differences between DRAM and SRAM?
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Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)
If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?
How about voltage source?
What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?
Explain what is Verilog?