Answer / guest

according to the equation N α V-Ia*Ra as load increases
armature current Ia increases hence voltage drop therefore the
speed.

There are 2 Flip_Flop with logic between them. Given Clock to Q delay, logic prop. delay, set up and hold times specify maximum clock frequency of system. What happens if second output fed back to first input. Any changes? What happens with timing if second output is fed back to logic between the flops? Good Luck!

1 Answers   Qualcomm,

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how the diesel generator maintain the rpm when the generator loaded varies from 10% to 70% immediately?

3 Answers  

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A 400KVA ,50HZ TRANSFORMER IS TO BE OPERATED AT 50HZ.THEN KVA RATING OF THE TRANSFORMER?.

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what is current

53 Answers   Bio Enterprises, CLG, TCS,

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what difference between tapping -15% to +5 % and -5% to +15% tap. & how can define HV turns on maximun & minimum tap of power transformer.

2 Answers  

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What is the minimum IR value of HT/ LT cable? Pls post separetely!!!!!

0 Answers   Bhel,

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i want prepare power grid exam what are book we want refer for electrical ?

5 Answers  

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What will happen if the interpoles in case of a generator have opposite polarities to that behind it in the direction of rotation ?

1 Answers  

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i need about 10 years of GATE solved papers in pdf format and even mock tests toooo

0 Answers  

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Which one is correct mVA or MVA. Whether both the units are same for the transformer

10 Answers   Areva,

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what is diffrence between dc motor and dc generator?

3 Answers   HBL Power Systems,

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Why transformer used in UPS??

0 Answers   JLL,

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