In Verilog code what does “timescale 1 ns/ 1 ps” signifies?
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Write a VLSI program that implements a toll booth controller?
How can you construct both PMOS and NMOS on a single substrate?
What?s the critical path in a SRAM?
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How logical gates are controlled by boolean logic?
Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
What r the phenomenon which come into play when the devices are scaled to the sub-micron lengths?
Implement D flip-flop with a couple of latches? Write a VHDL Code for a D flip-flop?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.
Explain Cross section of a PMOS transistor?
What does the above code synthesize to?
Explain the working of Insights of a pass gate ?
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus