How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

0 Answers   Infosys,

---

Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

0 Answers   Infosys,

---

For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

3 Answers   Intel,

---

What is the difference between the mealy and moore state machine?

0 Answers  

---

Why don?t we use just one NMOS or PMOS transistor as a transmission gate?

2 Answers   Infosys,

---

Explain the operation considering a two processor computer system with a cache for each processor.

0 Answers   Intel,

---

what is multiplexer?

0 Answers  

---

Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)

6 Answers  

---

What was your role in the silicon evaluation/product ramp? What tools did you use?

0 Answers   Intel,

---

What are the different types of skews used in vlsi?

1 Answers  

---

What is the purpose of having depletion mode device?

0 Answers  

---

Insights of a Tri-State Inverter?

3 Answers   Intel,

---