Answer / pradeep

Noise margin simply means margin for noise. it can tolerate
some amount of noise. The senders must be held at higher
standards than the receivers. For a 5V level, a voltage
above 4.5V is considered 1, and for receiver the voltage
above 3.5V is considered 1. therefore, the noise margin
4.5-3.5=1V.
it is deigned by looking at voltage transfer function.

Answer / bhau

In digital logic design the general representation of input
and output are High and low level (1's and 0's). In actual
case when the input signal transitions the output switches
to full swing before the input has reached its full swing.
The minimum signal level to get a out put High or low is
called VIH, VIL (For inversion stage Input for getting full
output low swing and input for getting full output high
swing). For the interoperability of this logic device i.e.
to use tihs output directly to feed into next stage without
level shifting the VIL > VOL, similarly VIH < VOH. In such
condition when logic swing VIL is enough to get full swing
on Output the noise margin will be VOL-VIL. Similarly NM
for signal transitioning high is VOH-VIH.

Answer / shubham sharma

"noise margine is the max. voltage that can be added to the
logic gate input which will not affect the output."
voh>vih>vil>vol

vil=0,vol=0.
vih=1,voh=1.

Answer / bhau

In digital logic design the general representation of input
and output are High and low level (1's and 0's). In actual
case when the input signal transitions the output switches
to full swing before the input has reached its full swing.
The minimum signal level to get a out put High or low is
called VIH, VIL (For inversion stage Input for getting full
output low swing and input for getting full output high
swing). For the interoperability of this logic device i.e.
to use tihs output directly to feed into next stage without
level shifting the VIL > VOL, similarly VIH < VOH. In such
condition when logic swing VIL is enough to get full swing
on Output the noise margin will be VOL-VIL. Similarly NM
for signal transitioning high is VOH-VIH.

what is Early effects and their physical origin.

1 Answers  

---

What is the critical path in a SRAM?

0 Answers  

---

Are you familiar with the term MESI?

1 Answers   Intel,

---

Explain the Working of a 2-stage OPAMP?

0 Answers   Intel,

---

Explain CMOS Inverter transfer characteristics?

0 Answers   ADS,

---

---

What are the different design techniques required to create a layout for digital circuits?

0 Answers  

---

What is the function of enhancement mode transistor?

0 Answers  

---

What are the total number of lines written by you in C/C++? What compiler was used?

1 Answers   Intel, Zensar,

---

what is short Channel effect.

2 Answers  

---

How does a pn junction works?

2 Answers   Wipro,

---

What is the purpose of having depletion mode device?

0 Answers  

---

What is pipelining and how can we increase throughput using pipelining?

1 Answers   Intel,

---