Answer Posted / pradeep

Noise margin simply means margin for noise. it can tolerate
some amount of noise. The senders must be held at higher
standards than the receivers. For a 5V level, a voltage
above 4.5V is considered 1, and for receiver the voltage
above 3.5V is considered 1. therefore, the noise margin
4.5-3.5=1V.
it is deigned by looking at voltage transfer function.

What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

2455

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What types of high speed CMOS circuits have you designed?

2584

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Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

3871

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Explain CMOS Inverter transfer characteristics?

3933

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What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus

1280

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In vlsi chip 1000s of transistors are dropped, specifically categorized. Which method is used to achieve this & how it is done practically?

1026

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What is the critical path in a SRAM?

3209

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What are the different measures that are required to achieve the design for better yield?

1229

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What products have you designed which have entered high volume production?

2451

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Explain Cross section of an NMOS transistor?

1049

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Explain the Various steps in Synthesis?

3287

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Differences between IRSIM and SPICE?

5450

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

1288

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What is the purpose of having depletion mode device?

1066

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Mention what are the two types of procedural blocks in Verilog?

1314

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