What is the difference between synchronous and asynchronous reset?
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Explain the Working of a 2-stage OPAMP?
How do you size NMOS and PMOS transistors to increase the threshold voltage?
For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
Explain what is slack?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Why is OOPS called OOPS? (C++)
What types of high speed CMOS circuits have you designed?
What is the ideal input and output resistance of a current source?
In what cases do you need to double clock a signal before presenting it to a synchronous state machine?
Give the cross-sectional diagram of the cmos.
Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
Cross section of an NMOS transistor?