How does Resistance of the metal lines vary with increasing thickness and increasing length?

3 Answers   Infosys,

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What is the difference between nmos and pmos technologies?

0 Answers  

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What are the different classification of the timing control?

0 Answers  

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What are the steps involved in designing an optimal pad ring?

0 Answers  

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what is body effect?

1 Answers  

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What are the main issues associated with multiprocessor caches and how might you solve them?

1 Answers   Intel,

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Explain Cross section of an NMOS transistor?

0 Answers   Intel,

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what is conductance and valence band?

1 Answers  

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You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?

4 Answers   Intel,

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Implement F= not (AB+CD) using CMOS gates?

1 Answers   Intel,

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In Verilog code what does “timescale 1 ns/ 1 ps” signifies?

0 Answers  

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In vlsi chip 1000s of transistors are dropped, specifically categorized. Which method is used to achieve this & how it is done practically?

0 Answers  

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