Answer / suresh

clock skew,positive skew,negative skew

what is verilog?

0 Answers  

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Differences between netlist of HSPICE and Spectre?

1 Answers   Intel,

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Explain the operation of a 6T-SRAM cell?

0 Answers   Intel,

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What is the difference between synchronous and asynchronous reset?

0 Answers  

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What is component binding?

2 Answers   Intel,

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Differences between D-Latch and D flip-flop?

17 Answers   AIT, Intel, Sibridge Technologies,

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How does Resistance of the metal lines vary with increasing thickness and increasing length?

3 Answers   Infosys,

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Explain the Charge Sharing problem while sampling data from a Bus?

1 Answers  

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You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

0 Answers   Infosys,

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Explain what is the depletion region?

0 Answers  

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Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

1 Answers   Intel,

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What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

1 Answers   Intel,

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