What transistor level design tools are you proficient with? What types of designs were they used on?

0 Answers   Intel,

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Draw the SRAM Write Circuitry

0 Answers   Infosys,

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)

0 Answers   Infosys,

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Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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What are set up time & hold time constraints? What do they signify?

3 Answers  

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What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

0 Answers   Intel,

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What happens when the gate oxide is very thin?

3 Answers   Intel,

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Id vs. Vds Characteristics of NMOS and PMOS transistors?

1 Answers   Brillient, Intel, ISRO,

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What is Noise Margin? Explain the procedure to determine Noise Margin?

0 Answers  

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What are the steps required to solve setup and hold violations in vlsi?

0 Answers  

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Explain why & how a MOSFET works?

2 Answers   Infosys,

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