What are the steps involved in preventing the metastability?

0 Answers  

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,

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What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus

0 Answers   Infosys,

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What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

1 Answers   Intel,

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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Are you familiar with VHDL and/or Verilog?

17 Answers   Intel,

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How about voltage source?

0 Answers  

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What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

0 Answers   Intel,

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What is the depletion region?

1 Answers  

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Basic Stuff related to Perl?

0 Answers   Intel,

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In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

3 Answers   IBM, Intel, nvidia,

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Insights of a 2 input NOR gate. Explain the working?

1 Answers   Infosys, Intel,

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