Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?

13 Answers   Intel,

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How does a pn junction works?

2 Answers   Wipro,

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What are set up time & hold time constraints? What do they signify?

3 Answers  

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Why do we need both PMOS and NMOS transistors to implement a pass gate?

3 Answers   INEL, Intel,

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Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)

0 Answers   Infosys,

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What is FPGA?

7 Answers   Intel,

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What is pipelining and how can we increase throughput using pipelining?

1 Answers   Intel,

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Draw the stick diagram of a NOR gate. Optimize it

0 Answers   Infosys,

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What is the function of chain reordering?

0 Answers  

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Differences between Signals and Variables in VHDL? If the same code is written using Signals and Variables what does it synthesize to?

1 Answers   IIT, Intel,

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What is polymorphism? (C++)

2 Answers   Intel,

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Write a program to explain the comparator?

0 Answers  

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