Give the expression for CMOS switching power dissipation?

2 Answers   Cypress Semiconductor,

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For CMOS logic, give the various techniques you know to minimize power consumption

0 Answers   Infosys,

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Are you familiar with VHDL and/or Verilog?

17 Answers   Intel,

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Differences between blocking and Non-blocking statements in Verilog?

5 Answers   Intel,

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What r the phenomenon which come into play when the devices are scaled to the sub-micron lengths?

4 Answers   Intel,

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What happens to delay if you increase load capacitance?

3 Answers   Infosys,

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What happens if we delay the enabling of Clock signal?

0 Answers  

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

3 Answers   Intel,

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Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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What is latchup? Explain the methods used to prevent it?

2 Answers   Intel,

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what is short Channel effect.

2 Answers  

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How do you size NMOS and PMOS transistors to increase the threshold voltage?

0 Answers   Infosys,

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