What is the difference between = and == in C?

5 Answers   Intel,

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What are the main issues associated with multiprocessor caches and how might you solve them?

1 Answers   Intel,

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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Differences between D-Latch and D flip-flop?

17 Answers   AIT, Intel, Sibridge Technologies,

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While using logic design, explain the various steps that r followed to obtain the desirable design in a well defined manner?

1 Answers   Intel,

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Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

0 Answers   Infosys,

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What products have you designed which have entered high volume production?

1 Answers   Intel,

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Explain CMOS Inverter transfer characteristics?

0 Answers   ADS,

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Explain the various MOSFET Capacitances & their significance ?

1 Answers   Infosys,

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For f = AB+CD if B is S-a-1, what r the test vectors needed to detect the fault?

5 Answers   Intel,

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What are the limitations in increasing the power supply to reduce delay?

2 Answers   Infosys,

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Implement D flip-flop with a couple of latches? Write a VHDL Code for a D flip-flop?

6 Answers   Intel,

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