How do you size NMOS and PMOS transistors to increase the
threshold voltage?
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Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
In Verilog code what does “timescale 1 ns/ 1 ps” signifies?
What is the function of tie-high and tie-low cells?
Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?
WHAT IS THE DIFFERENCE BETWEEN TESTING AND VERIFICATION OF VLSI CIRCUIT?
What is LVS, DRC?
Explain the various Capacitances associated with a transistor and which one of them is the most prominent?
What are the steps required to solve setup and hold violations in vlsi?
Explain ASIC Design Flow?
2 Answers Intel, JK Associates, Mind Tree,
What happens if we use an Inverter instead of the Differential Sense Amplifier?
Implement a 2 I/P and gate using Tran gates?
Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?