What is a D-latch? Write the VHDL Code for it?

Answers were Sorted based on User's Feedback



What is a D-latch? Write the VHDL Code for it?..

Answer / rams

D latch is a device it simply transfers data from input to
output when the enable is activated.its used for the
forming of d flip flops.

Is This Answer Correct ?    17 Yes 4 No

What is a D-latch? Write the VHDL Code for it?..

Answer / sghsg

library ieee;
use ieee.std_logic_1164.all;

entity D_latch is
port (
clk : in std_logic;
d : in std_logic;
q : out std_logic
);
end D_latch;

architecture arch_D_latch of D_latch is
begin
process(d,clk)
begin
-- +ve level sensitive
if(clk = '1') then
q <= d;
else
q <= q;
end if;
end process;
end arch_D_latch;

Is This Answer Correct ?    0 Yes 0 No

What is a D-latch? Write the VHDL Code for it?..

Answer / bhushan

D-Latch is a level sensitive flip-flop.
output changes as long as clock is High(for +ve level
sensitive) or High(for -ve level sensitive)


library ieee;
use ieee.std_logic_1164.all;

entity D_latch is
port (
clk : in std_logic;
d : in std_logic;
q : out std_logic
);
end D_latch;

architecture arch_D_latch of D_latch is
begin
process(d,clk)
begin
-- +ve level sensitive
if(clk = '1') then
q <= d;
else
q <= q;
end if;
end process;

end arch_D_latch;

Is This Answer Correct ?    23 Yes 24 No

Post New Answer

More VLSI Interview Questions

For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

1 Answers   Intel,


Explain the difference between write through and write back cache.

2 Answers   Intel,


Tell me how MOSFET works.

1 Answers  


What are set up time & hold time constraints? What do they signify?

3 Answers  


Mention what are three regions of operation of mosfet and how are they used?

1 Answers  


You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?

4 Answers   Intel,


Explain Cross section of a PMOS transistor?

1 Answers   Intel,


Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.

1 Answers   Infosys,


Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,


What transistor level design tools are you proficient with? What types of designs were they used on?

1 Answers   Intel,


what is Slack?

1 Answers  


Give various factors on which threshold voltage depends.

1 Answers  


Categories