Golgappa.net | Golgappa.org | BagIndia.net | BodyIndia.Com | CabIndia.net | CarsBikes.net | CarsBikes.org | CashIndia.net | ConsumerIndia.net | CookingIndia.net | DataIndia.net | DealIndia.net | EmailIndia.net | FirstTablet.com | FirstTourist.com | ForsaleIndia.net | IndiaBody.Com | IndiaCab.net | IndiaCash.net | IndiaModel.net | KidForum.net | OfficeIndia.net | PaysIndia.com | RestaurantIndia.net | RestaurantsIndia.net | SaleForum.net | SellForum.net | SoldIndia.com | StarIndia.net | TomatoCab.com | TomatoCabs.com | TownIndia.com
Interested to Buy Any Domain ? << Click Here >> for more details...


What is Noise Margin? Explain the procedure to determine
Noise Margin?


No Answer is Posted For this Question
Be the First to Post Answer

Post New Answer

More VLSI Interview Questions

verify nmos passes good logic 0 and passes bad logic 1.also verify that pmos passes good logic 1 and passes bad logic 0.

2 Answers   Cosmic Circuits, HP,


Explain the operation considering a two processor computer system with a cache for each processor.

0 Answers   Intel,


How many bit combinations are there in a byte?

6 Answers   Intel,


What are the steps required to solve setup and hold violations in vlsi?

0 Answers  


For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

0 Answers   Intel,


What are the different design constraints occur in the synthesis phase?

0 Answers  


Draw a CMOS Inverter. Explain its transfer characteristics

0 Answers   Infosys,


How to find the read failiure probablity in SRAM?

2 Answers  


What is the difference between cmos and bipolar technologies?

0 Answers  


What products have you designed which have entered high volume production?

0 Answers   Intel,


Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45&#61549;m wide metal wire with sheet resistance R = 0.065 &#61527;/ and Cpermicron= 0.25 fF/&#61549;m. The resistance and capacitance of the unit NMOS are 6.5k&#61527; and 2.5fF. Use a 3 segment &#61552;-model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

0 Answers  


For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?

0 Answers   Intel,


Categories