WHAT IS THE DIFFERENCE BETWEEN TESTING AND VERIFICATION OF VLSI CIRCUIT?

5 Answers   Intel, Wipro,

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Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?

0 Answers   Infosys,

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What types of CMOS memories have you designed? What were their size? Speed?

0 Answers   Intel, Wipro,

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You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

0 Answers   Infosys,

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what are three regions of operation of MOSFET and how are they used?

0 Answers  

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Explain Clock Skew?

6 Answers   Intel, nvidia,

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Cross section of a PMOS transistor?

0 Answers   Intel,

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Explain the working of differential sense amplifier?

1 Answers  

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For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

0 Answers   Infosys,

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A circuit has 1 input X and 2 outputs A and B. If X = HIGH for 4 clock ticks, A = 1. If X = LOW for 4 clock ticks, B = 1. Draw a state diagram for this Spec?

3 Answers   Intel,

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What are the ways to Optimize the Performance of a Difference Amplifier?

0 Answers  

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Id vs. Vds Characteristics of NMOS and PMOS transistors?

1 Answers   Brillient, Intel, ISRO,

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