For CMOS logic, give the various techniques you know to minimize power consumption

0 Answers   Infosys,

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What are the main issues associated with multiprocessor caches and how might you solve them?

0 Answers   Intel,

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Cross section of a PMOS transistor?

0 Answers   Intel,

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Explain ASIC Design Flow?

2 Answers   Intel, JK Associates, Mind Tree,

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For a 0.18um and 0.8um technology MOSFET, which has a higher cutoff frequency?

2 Answers  

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Give the cross-sectional diagram of the cmos.

0 Answers  

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Working of a 2-stage OPAMP?

0 Answers   Intel, Tata Elxsi,

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Explain the working of 4-bit Up/down Counter?

0 Answers   Intel,

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verify nmos passes good logic 0 and passes bad logic 1.also verify that pmos passes good logic 1 and passes bad logic 0.

2 Answers   Cosmic Circuits, HP,

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Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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What happens if we delay the enabling of Clock signal?

0 Answers  

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You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?

4 Answers   Intel,

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