Factors affecting Power Consumption on a chip?
Answers were Sorted based on User's Feedback
Answer / srujana
Power consumption on a chip can be classified majorly in
to 2 types:
1. Static Power consumption
2. Dynamic Power consumption
Static Power consumption: Leakage power is the major
contributor in static power consumption. The subthreshold
leakage power due to reduced threshold value due to
reduced supply voltages as technology is shrinking is the
major contributor of leakage power.
Dynamic Power consumption:
1.This is due to the increase in frequency of the chip,
which results in high switching rates of the clock
2. Due to increase in the complexity of the chip and the
increase in the instance count of the chip.
| Is This Answer Correct ? | 16 Yes | 0 No |
Answer / khush
the faster the clock the more power used, the longer the
wires the more power used, the number of transitions i.e.
the faster the switching the more power used - power is
proportional to switching frequency.
| Is This Answer Correct ? | 8 Yes | 0 No |
Answer / pankaj
power is dirlectly proportional to the square of suplly
voltage so is the supply voltage reduces the power is also
reduced but the lekage cuurent is increased. so voltage
level can't be reduced so much.
| Is This Answer Correct ? | 6 Yes | 1 No |
Answer / subu
1) Number of state Transition.
2) Ideal clock input (instead we can give clock gating)
| Is This Answer Correct ? | 5 Yes | 2 No |
Answer / bhawna
In addition to Static and Dynamic Power the other major contributor is:
Activity factor - how often the gates are switching
Optimal sizing - same logical effort is approximately same delay however the least size will give least power
Total Capacitance charging/discharging per cycle - depends on optimal layout design to reduce the capacitance by proper choice of available metal layers
| Is This Answer Correct ? | 2 Yes | 0 No |
Answer / rajkumar
Leakage power
Dynamic power
Short circuit power
| Is This Answer Correct ? | 0 Yes | 0 No |
Answer / p.mgr
If the coding of chip is increased then the power
consumption also increased
| Is This Answer Correct ? | 4 Yes | 14 No |
How to find the read failiure probablity in SRAM?
Explain how binary number can give a signal or convert into a digital signal?
What is look up table in vlsi?
Differences between functions and Procedures in VHDL?
What is clock feed through?
Give the expression for CMOS switching power dissipation?
In what cases do you need to double clock a signal before presenting it to a synchronous state machine?
Explain the Charge Sharing problem while sampling data from a Bus?
Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
What are set up time & hold time constraints? What do they signify?
what is Slack?