How can you construct both PMOS and NMOS on a single substrate?

0 Answers   IBM, Intel,

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What are the different design constraints occur in the synthesis phase?

0 Answers  

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What happens if we delay the enabling of Clock signal?

0 Answers  

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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What does the above code synthesize to?

0 Answers   Intel,

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What is the difference between = and == in C?

5 Answers   Intel,

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Working of a 2-stage OPAMP?

0 Answers   Intel, Tata Elxsi,

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Explain the Various steps in Synthesis?

0 Answers   Intel,

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What is Fermi level?

5 Answers  

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What types of high speed CMOS circuits have you designed?

0 Answers   Intel,

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What happens to delay if we include a resistance at the output of a CMOS circuit?

1 Answers   Infosys,

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Implement F = AB+C using CMOS gates?

2 Answers   Intel,

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