Id vs. Vds Characteristics of NMOS and PMOS transistors?
A circuit has 1 input X and 2 outputs A and B. If X = HIGH for 4 clock ticks, A = 1. If X = LOW for 4 clock ticks, B = 1. Draw a state diagram for this Spec?
Draw a CMOS Inverter. Explain its transfer characteristics
Working of a 2-stage OPAMP?
Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
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Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?
What are the changes that are provided to meet design power targets?
How logical gates are controlled by boolean logic?
Give the expression for calculating Delay in CMOS circuit?
what is body effect?
What is interrupt latency?
Mention what are the two types of procedural blocks in Verilog?
How can you model a SRAM at RTL Level?