Explain the working of Insights of an inverter ?

0 Answers   Intel,

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What is Body Effect?

0 Answers   CG CoreEL, Cisco, TA,

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Are you familiar with VHDL and/or Verilog?

17 Answers   Intel,

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Differences between blocking and Non-blocking statements in Verilog?

5 Answers   Intel,

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What?s the difference between Testing & Verification?

6 Answers   Infosys,

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Explain Cross section of an NMOS transistor?

0 Answers   Intel,

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What happens if we use an Inverter instead of the Differential Sense Amplifier?

0 Answers   Infosys,

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For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

0 Answers   Infosys,

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What are the different measures that are required to achieve the design for better yield?

0 Answers  

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

3 Answers   Intel,

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How can you construct both PMOS and NMOS on a single substrate?

0 Answers   IBM, Intel,

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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