1,what is the different between signal and variables in
VHDL?
2,what is the different between function and procedure in
VHDL?
Answer / jimmy.gugon
Hello,
A function returns 1 value whereas a procedure can return
multiple values? Could someone elucidate this for me? Also, I
am confused about the scope of signals. If I declare a signal
within an architecture, does the scope of this signal extend
to functions declared within processes in the architecture? If
not, is there a way to do this without passing the signals? I
would like to call functions in a way resembling scripts that
allowed for greater code readability.
| Is This Answer Correct ? | 0 Yes | 3 No |
what is the eligibility criteria of mico bosch
when does transistor has power dissipation
What is a multimeter?
What does the voltmeter in ac mode show? Is it rms value or peak value?
Frequency at which VOICE is sampled is? a) 4 KHz b) 8 KHz c) 16 KHz d) 64 KHz
wat area the advantages of network gateway
Different types of communications? Explain.
Which modulation we use in case of GPRS?
define loop gain?
What are the specifications of the scr ?
with a neat sketch, show all the interconnections required between a 8085 processor and a RAM of size 4KB mapped in the range 2000H-2FFFH.
What are the poles of alternators made of?
Civil Engineering (5086)
Mechanical Engineering (4456)
Electrical Engineering (16639)
Electronics Communications (3918)
Chemical Engineering (1095)
Aeronautical Engineering (239)
Bio Engineering (96)
Metallurgy (361)
Industrial Engineering (259)
Instrumentation (3014)
Automobile Engineering (332)
Mechatronics Engineering (97)
Marine Engineering (124)
Power Plant Engineering (172)
Textile Engineering (575)
Production Engineering (25)
Satellite Systems Engineering (106)
Engineering AllOther (1379)