Answer / so0urav ghosh

if
1)tc(time period of clock pulse)>
time period of ff o/p pulse
2)both i/p of J-K ff is high
3)level triggered
then the o/p of J-K ff toggles.this is known by
RACE-AROUND condition

in J-K ff, it occur
it can be removed by MASTER-SLAVE J-K ff

Answer / jai sharma..... from meerut

When both input of s r or j k ff is high , then output is undetermined .... it is occur due to the greater propogation time of input as compared to Time of output pulse...... it can be removed by using master slave condition.....

Answer / sukhoi

when J=K=1,
the out put toggles 
ie there is uncertainity in the out put (since, time period of cloak>>time petiod of propagation delay)
this can be avoided by 
1,MASTER SLAVE JK-FF
2,Edge Triggerring

Answer / sohini

SR flip flop has the race-around condition.when both the inputs are high, the output enters a condition which is forbidden. A D-flip flop can be used to rectify this condition so that both the inputs are never in the same state.

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