Cross section of an NMOS transistor?

3 Answers   Intel,

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What is the depletion region?

1 Answers  

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What are the different measures that are required to achieve the design for better yield?

0 Answers  

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What happens to delay if we include a resistance at the output of a CMOS circuit?

1 Answers   Infosys,

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Explain the usage of the shared SPI bus?

1 Answers  

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What happens to delay if you increase load capacitance?

1 Answers   Google,

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Explain about stuck at fault models, scan design, BIST and IDDQ testing?

3 Answers   Intel,

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What is LVS, DRC?

10 Answers   IBM, Intel,

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Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

1 Answers   Intel,

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Explain depletion region.

0 Answers  

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Explain about 6-T XOR gate?

0 Answers   Intel,

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In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?

0 Answers   Infosys,

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