Explain about 6-T XOR gate?
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How do you size NMOS and PMOS transistors to increase the threshold voltage?
What are the different measures that are required to achieve the design for better yield?
How does Vbe and Ic change with temperature?
For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?
Describe the various effects of scaling?
what is Early effects and their physical origin.
what is Latch up?How to avoid Latch up?
What are the limitations in increasing the power supply to reduce delay?
Explain about stuck at fault models, scan design, BIST and IDDQ testing?
Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
What is the difference between nmos and pmos technologies?
Explain the various MOSFET Capacitances & their significance ?